{"id":1517,"date":"2026-05-21T07:57:33","date_gmt":"2026-05-21T07:57:33","guid":{"rendered":"https:\/\/cortexorigin.com\/?page_id=1517"},"modified":"2026-07-24T08:29:00","modified_gmt":"2026-07-24T08:29:00","slug":"cortex-nk-secure-boot","status":"publish","type":"page","link":"https:\/\/cortexorigin.com\/index.php\/cortex-nk-secure-boot\/","title":{"rendered":""},"content":{"rendered":"\n\n\n\n\nMenu ORIGIN\u2122<\/title>\n<style>\n@import url('https:\/\/fonts.googleapis.com\/css2?family=DM+Sans:wght@400;500;600;700&family=JetBrains+Mono:wght@400;500&display=swap');\n \nbody { margin: 0; padding: 0; background: #F4F0EB; font-family: 'DM Sans', sans-serif; min-height: 600px; }\n \n\/* Wrapper full-width \u2014 isolation stricte (all:initial) + 100vw, identique \u00e0 .cidor-page\n pour \u00e9chapper aux contraintes de largeur du th\u00e8me WordPress et garantir le bandeau jusqu'aux bords. *\/\n.menu-bar-wrapper {\n all: initial;\n display: block;\n box-sizing: border-box;\n width: 100vw;\n position: relative;\n left: calc(50% - 50vw);\n background: #0C1829;\n z-index: 9999;\n font-family: 'DM Sans', sans-serif;\n}\n \n.menu-bar {\n width: 100%;\n background: #0C1829;\n padding: 0 2rem;\n display: flex;\n align-items: center;\n justify-content: space-between;\n position: relative;\n z-index: 100;\n box-sizing: border-box;\n}\n.menu-logo {\n font-family: 'DM Sans', sans-serif; font-weight: 700; font-size: 0.95rem;\n color: #fff; padding: 1rem 0; letter-spacing: 0.03em; white-space: nowrap;\n}\n.menu-logo span { color: #C9A96E; }\n.menu-items { display: flex; align-items: center; gap: 0; }\n \n\/* \u2500\u2500 EAS \u00b7 EXPOSITION BUTTON (avec dropdown) \u2500\u2500 *\/\n.menu-eas-wrap {\n position: relative;\n display: flex;\n align-items: center;\n padding: 1rem 0;\n margin-right: 0.5rem;\n}\n.menu-eas {\n display: flex; align-items: center;\n padding: 0.45rem 1rem;\n background: rgba(201,169,110,0.12);\n border: 1px solid rgba(201,169,110,0.35);\n border-radius: 3px;\n font-family: 'JetBrains Mono', monospace;\n font-size: 0.65rem; font-weight: 500;\n letter-spacing: 0.08em; text-transform: uppercase;\n color: #C9A96E;\n text-decoration: none;\n transition: all 0.25s;\n white-space: nowrap;\n gap: 0.5rem;\n}\n.menu-eas::before {\n content: '\u25ce';\n font-size: 0.75rem;\n opacity: 0.7;\n}\n.menu-eas::after {\n content: '\u25be';\n margin-left: 0.4rem;\n font-size: 0.6rem;\n opacity: 0.55;\n}\n.menu-eas:hover {\n background: rgba(201,169,110,0.25);\n border-color: rgba(201,169,110,0.6);\n color: #fff;\n}\n.menu-eas-wrap:hover .menu-dropdown-eas { display: block; }\n.menu-dropdown-eas {\n display: none; position: absolute; top: 100%; left: 0;\n background: #0C1829; border: 1px solid rgba(74,144,217,0.15);\n border-top: 2px solid #C9A96E; border-radius: 0 0 4px 4px;\n min-width: 360px; padding: 0.8rem 0; z-index: 99999;\n box-shadow: 0 12px 40px rgba(0,0,0,0.4);\n}\n \n\/* \u2500\u2500 AETZU ARROW AI BUTTON \u2500\u2500 *\/\n.menu-aetzu {\n display: flex; align-items: center;\n padding: 0.45rem 1rem;\n background: rgba(201,169,110,0.12);\n border: 1px solid rgba(201,169,110,0.35);\n border-radius: 3px;\n font-family: 'JetBrains Mono', monospace;\n font-size: 0.65rem; font-weight: 500;\n letter-spacing: 0.08em; text-transform: uppercase;\n color: #C9A96E;\n text-decoration: none;\n transition: all 0.25s;\n white-space: nowrap;\n gap: 0.5rem;\n}\n.menu-aetzu::before {\n content: '\u2b21';\n font-size: 0.75rem;\n opacity: 0.7;\n}\n.menu-aetzu::after {\n content: '\u25be';\n margin-left: 0.4rem;\n font-size: 0.6rem;\n opacity: 0.55;\n}\n.menu-aetzu-wrap {\n position: relative;\n display: flex;\n align-items: center;\n padding: 1rem 0;\n margin-right: 0.5rem;\n}\n.menu-aetzu-wrap:hover .menu-dropdown-aetzu { display: block; }\n.menu-dropdown-aetzu {\n display: none; position: absolute; top: 100%; left: 0;\n background: #0C1829; border: 1px solid rgba(74,144,217,0.15);\n border-top: 2px solid #C9A96E; border-radius: 0 0 4px 4px;\n min-width: 360px; padding: 0.8rem 0; z-index: 99999;\n box-shadow: 0 12px 40px rgba(0,0,0,0.4);\n}\n.menu-aetzu:hover {\n background: rgba(201,169,110,0.25);\n border-color: rgba(201,169,110,0.6);\n color: #fff;\n}\n \n\/* \u2500\u2500 CORTEX WEB & API BUTTON \u2500\u2500 *\/\n.menu-webapi {\n display: flex; align-items: center;\n padding: 0.45rem 1rem;\n background: rgba(201,169,110,0.12);\n border: 1px solid rgba(201,169,110,0.35);\n border-radius: 3px;\n font-family: 'JetBrains Mono', monospace;\n font-size: 0.65rem; font-weight: 500;\n letter-spacing: 0.08em; text-transform: uppercase;\n color: #C9A96E;\n text-decoration: none;\n transition: all 0.25s;\n white-space: nowrap;\n gap: 0.5rem;\n}\n.menu-webapi::before {\n content: '\u25a3';\n font-size: 0.75rem;\n opacity: 0.7;\n}\n.menu-webapi::after {\n content: '\u25be';\n margin-left: 0.4rem;\n font-size: 0.6rem;\n opacity: 0.55;\n}\n.menu-webapi-wrap {\n position: relative;\n display: flex;\n align-items: center;\n padding: 1rem 0;\n margin-right: 0.5rem;\n}\n.menu-webapi-wrap:hover .menu-dropdown-webapi { display: block; }\n.menu-dropdown-webapi {\n display: none; position: absolute; top: 100%; left: 0;\n background: #0C1829; border: 1px solid rgba(74,144,217,0.15);\n border-top: 2px solid #C9A96E; border-radius: 0 0 4px 4px;\n min-width: 360px; padding: 0.8rem 0; z-index: 99999;\n box-shadow: 0 12px 40px rgba(0,0,0,0.4);\n}\n.menu-webapi:hover {\n background: rgba(201,169,110,0.25);\n border-color: rgba(201,169,110,0.6);\n color: #fff;\n}\n \n\/* \u2500\u2500 CORTEX APP\u00c2T & LEURRE BUTTON (avec dropdown \u2014 BAITS) \u2500\u2500 *\/\n.menu-appat-wrap {\n position: relative;\n display: flex;\n align-items: center;\n padding: 1rem 0;\n margin-right: 0.5rem;\n}\n.menu-appat {\n display: flex; align-items: center;\n padding: 0.45rem 1rem;\n background: rgba(201,169,110,0.12);\n border: 1px solid rgba(201,169,110,0.35);\n border-radius: 3px;\n font-family: 'JetBrains Mono', monospace;\n font-size: 0.65rem; font-weight: 500;\n letter-spacing: 0.08em; text-transform: uppercase;\n color: #C9A96E;\n text-decoration: none;\n transition: all 0.25s;\n white-space: nowrap;\n gap: 0.5rem;\n}\n.menu-appat::before {\n content: '\u2b22';\n font-size: 0.7rem;\n opacity: 0.7;\n}\n.menu-appat::after {\n content: '\u25be';\n margin-left: 0.4rem;\n font-size: 0.6rem;\n opacity: 0.55;\n}\n.menu-appat:hover {\n background: rgba(201,169,110,0.25);\n border-color: rgba(201,169,110,0.6);\n color: #fff;\n}\n.menu-appat-wrap:hover .menu-dropdown-appat { display: block; }\n.menu-dropdown-appat {\n display: none; position: absolute; top: 100%; left: 0;\n background: #0C1829; border: 1px solid rgba(74,144,217,0.15);\n border-top: 2px solid #C9A96E; border-radius: 0 0 4px 4px;\n min-width: 360px; padding: 0.8rem 0; z-index: 99999;\n box-shadow: 0 12px 40px rgba(0,0,0,0.4);\n}\n \n\/* \u2500\u2500 CORTEX NK BUTTON (avec dropdown) \u2500\u2500 *\/\n.menu-cortexnk-wrap {\n position: relative;\n display: flex;\n align-items: center;\n padding: 1rem 0;\n margin-right: 0.5rem;\n}\n.menu-cortexnk {\n display: flex; align-items: center;\n padding: 0.45rem 1rem;\n background: rgba(201,169,110,0.12);\n border: 1px solid rgba(201,169,110,0.35);\n border-radius: 3px;\n font-family: 'JetBrains Mono', monospace;\n font-size: 0.65rem; font-weight: 500;\n letter-spacing: 0.08em; text-transform: uppercase;\n color: #C9A96E;\n text-decoration: none;\n transition: all 0.25s;\n white-space: nowrap;\n gap: 0.5rem;\n}\n.menu-cortexnk::before {\n content: '\u25c6';\n font-size: 0.7rem;\n opacity: 0.7;\n}\n.menu-cortexnk::after {\n content: '\u25be';\n margin-left: 0.4rem;\n font-size: 0.6rem;\n opacity: 0.55;\n}\n.menu-cortexnk:hover {\n background: rgba(201,169,110,0.25);\n border-color: rgba(201,169,110,0.6);\n color: #fff;\n}\n.menu-cortexnk-wrap:hover .menu-dropdown-cortexnk { display: block; }\n.menu-dropdown-cortexnk {\n display: none; position: absolute; top: 100%; left: 0;\n background: #0C1829; border: 1px solid rgba(74,144,217,0.15);\n border-top: 2px solid #C9A96E; border-radius: 0 0 4px 4px;\n min-width: 360px; padding: 0.8rem 0; z-index: 99999;\n box-shadow: 0 12px 40px rgba(0,0,0,0.4);\n}\n \n\/* \u2500\u2500 BENCHMARK & V\u00c9RIFICATION BUTTON (m\u00e9ga-d\u00e9roulant fusionn\u00e9) \u2500\u2500 *\/\n.menu-benchmark-wrap {\n position: relative;\n display: flex;\n align-items: center;\n padding: 1rem 0;\n margin-right: 0.5rem;\n}\n.menu-benchmark {\n display: flex; align-items: center;\n padding: 0.45rem 1rem;\n background: rgba(74,144,217,0.10);\n border: 1px solid rgba(74,144,217,0.30);\n border-radius: 3px;\n font-family: 'JetBrains Mono', monospace;\n font-size: 0.65rem; font-weight: 500;\n letter-spacing: 0.08em; text-transform: uppercase;\n color: rgba(184,212,240,0.85);\n text-decoration: none;\n transition: all 0.25s;\n white-space: nowrap;\n gap: 0.5rem;\n}\n.menu-benchmark::before {\n content: '\u25c8';\n font-size: 0.7rem;\n opacity: 0.65;\n}\n.menu-benchmark::after {\n content: '\u25be';\n margin-left: 0.4rem;\n font-size: 0.6rem;\n opacity: 0.55;\n}\n.menu-benchmark:hover {\n background: rgba(74,144,217,0.22);\n border-color: rgba(74,144,217,0.55);\n color: #fff;\n}\n.menu-benchmark-wrap:hover .mega-dropdown { display: block; }\n \n.menu-item {\n position: relative; padding: 1rem 1rem;\n font-size: 0.78rem; font-weight: 500; color: rgba(184,212,240,0.75);\n cursor: pointer; letter-spacing: 0.02em; transition: color 0.2s;\n white-space: nowrap;\n}\n.menu-item:hover { color: #fff; }\n.menu-item::after {\n content: '\u25be'; margin-left: 0.3rem; font-size: 0.6rem; opacity: 0.5;\n}\n.menu-item.no-drop::after { content: ''; }\n.menu-cta {\n font-family: 'JetBrains Mono', monospace; font-size: 0.65rem; font-weight: 500;\n letter-spacing: 0.08em; text-transform: uppercase;\n padding: 0.5rem 1.2rem; border-radius: 2px;\n background: rgba(201,169,110,0.15); color: #C9A96E; border: 1px solid rgba(201,169,110,0.3);\n cursor: pointer; transition: all 0.3s; white-space: nowrap;\n}\n.menu-cta:hover { background: rgba(201,169,110,0.25); color: #fff; }\n \n.menu-dropdown {\n display: none; position: absolute; top: 100%; left: 0;\n background: #0C1829; border: 1px solid rgba(74,144,217,0.15);\n border-top: 2px solid #C9A96E; border-radius: 0 0 4px 4px;\n min-width: 320px; padding: 0.8rem 0; z-index: 99999;\n box-shadow: 0 12px 40px rgba(0,0,0,0.4);\n}\n.menu-item:hover .menu-dropdown { display: block; }\n.menu-dropdown a {\n display: block; padding: 0.5rem 1.5rem; font-size: 0.8rem; color: rgba(184,212,240,0.6);\n text-decoration: none; transition: all 0.2s; line-height: 1.5;\n}\n.menu-dropdown a:hover { color: #fff; background: rgba(74,144,217,0.08); }\n.menu-dropdown .drop-label {\n font-family: 'JetBrains Mono', monospace; font-size: 0.58rem; font-weight: 600;\n letter-spacing: 0.15em; color: #C9A96E; text-transform: uppercase;\n padding: 0.6rem 1.5rem 0.3rem; display: block;\n}\n.menu-dropdown .drop-sep {\n border: none; border-top: 1px solid rgba(74,144,217,0.08);\n margin: 0.5rem 1.5rem;\n}\n \n.menu-dropdown a.drop-highlight {\n display: flex; align-items: center; justify-content: space-between;\n margin: 0.4rem 0.8rem 0.2rem;\n padding: 0.55rem 1rem;\n background: rgba(201,169,110,0.08);\n border: 1px solid rgba(201,169,110,0.2);\n border-radius: 3px;\n color: #C9A96E;\n font-weight: 600; font-size: 0.78rem;\n transition: all 0.2s;\n}\n.menu-dropdown a.drop-highlight:hover {\n background: rgba(201,169,110,0.18); color: #fff; border-color: rgba(201,169,110,0.45);\n}\n.drop-highlight-arrow { font-size: 0.65rem; opacity: 0.6; margin-left: 8px; }\n \n.menu-dropdown a.drop-sim {\n display: flex; align-items: center; justify-content: space-between;\n margin: 0.25rem 0.8rem;\n padding: 0.5rem 1rem;\n background: rgba(74,144,217,0.06);\n border: 1px solid rgba(74,144,217,0.18);\n border-radius: 3px;\n color: rgba(184,212,240,0.85);\n font-size: 0.78rem;\n transition: all 0.2s;\n}\n.menu-dropdown a.drop-sim:hover {\n background: rgba(74,144,217,0.14); color: #fff; border-color: rgba(74,144,217,0.4);\n}\n.drop-sim-icon { font-size: 0.7rem; opacity: 0.55; margin-left: 8px; }\n.mega-dropdown {\n display: none; position: absolute; top: 100%; left: auto; right: 0;\n background: #0C1829; border: 1px solid rgba(74,144,217,0.15);\n border-top: 2px solid #C9A96E; border-radius: 0 0 4px 4px;\n width: 680px; padding: 1.5rem; z-index: 99999;\n box-shadow: 0 12px 40px rgba(0,0,0,0.4);\n}\n.menu-item:hover .mega-dropdown { display: block; }\n.mega-cols { display: grid; grid-template-columns: 1fr 1fr; gap: 0 2rem; }\n.mega-col .drop-label { padding: 0 0 0.3rem; }\n.mega-col .drop-label {\n font-family: 'JetBrains Mono', monospace; font-size: 0.58rem; font-weight: 600;\n letter-spacing: 0.15em; color: #C9A96E; text-transform: uppercase;\n display: block;\n}\n.mega-col a {\n display: block; padding: 0.35rem 0; font-size: 0.78rem; color: rgba(184,212,240,0.6);\n text-decoration: none; transition: color 0.2s;\n}\n.mega-col a:hover { color: #fff; }\n.mega-col .drop-sep {\n border: none; border-top: 1px solid rgba(74,144,217,0.08);\n}\n.mega-col a.drop-highlight {\n margin: 0.5rem 0 0.2rem; padding: 0.5rem 0.8rem;\n background: rgba(201,169,110,0.08); border: 1px solid rgba(201,169,110,0.2);\n border-radius: 3px; color: #C9A96E; font-weight: 600;\n display: flex; align-items: center; justify-content: space-between;\n}\n.mega-col a.drop-highlight:hover {\n background: rgba(201,169,110,0.18); color: #fff; border-color: rgba(201,169,110,0.45);\n}\n.mega-col a.drop-sim {\n margin: 0.35rem 0; padding: 0.45rem 0.8rem;\n background: rgba(74,144,217,0.06); border: 1px solid rgba(74,144,217,0.18);\n border-radius: 3px; color: rgba(184,212,240,0.85);\n display: flex; align-items: center; justify-content: space-between;\n font-size: 0.78rem;\n}\n.mega-col a.drop-sim:hover {\n background: rgba(74,144,217,0.14); color: #fff; border-color: rgba(74,144,217,0.4);\n}\n\/* \u2500\u2500 BOUTON INVESTISSEURS (CTA primaire, dor\u00e9 plein) \u2500\u2500 *\/\n.menu-investor {\n font-family: 'JetBrains Mono', monospace; font-size: 0.65rem; font-weight: 600;\n letter-spacing: 0.08em; text-transform: uppercase;\n padding: 0.5rem 1.2rem; border-radius: 2px;\n background: #C9A96E; color: #0C1829; border: 1px solid #C9A96E;\n cursor: pointer; transition: all 0.3s; white-space: nowrap; margin-right: 0.6rem;\n text-decoration: none; display: inline-block;\n}\n.menu-investor:hover { background: #d9bd87; border-color: #d9bd87; }\n.preview-hint {\n text-align: center; color: #6b7280; font-family: 'JetBrains Mono', monospace;\n font-size: 0.7rem; padding: 3rem 1rem 1rem; letter-spacing: 0.05em;\n}\n.preview-hint strong { color: #C9A96E; }\n<\/style>\n \n \n \n<div class=\"menu-bar-wrapper\">\n<div class=\"menu-bar\">\n <div class=\"menu-logo\"><span>ORIGIN\u2122<\/span><\/div>\n <div class=\"menu-items\">\n \n <!-- EAS \u00b7 EXPOSITION (entr\u00e9e de premier niveau) -->\n <div class=\"menu-eas-wrap\">\n <a href=\"https:\/\/cortexorigin.com\/index.php\/easevolution\/\" class=\"menu-eas\">\n EAS \u00b7 EXPOSITION\n <\/a>\n <div class=\"menu-dropdown menu-dropdown-eas\">\n <span class=\"drop-label\">Plateforme CTEM<\/span>\n <a href=\"https:\/\/cortexorigin.com\/index.php\/easevolution\/\" class=\"drop-highlight\">\n EAS \u00b7 Exposition externe et interne\n <span class=\"drop-highlight-arrow\">\u2197<\/span>\n <\/a>\n <hr class=\"drop-sep\">\n <span class=\"drop-label\">Ce que la plateforme mesure<\/span>\n <a href=\"https:\/\/cortexorigin.com\/index.php\/easevolution\/#interne\" class=\"drop-sim\">\n P\u00e9rim\u00e8tre interne \u00b7 annuaire LDAP \/ AD\n <span class=\"drop-sim-icon\">\u2197<\/span>\n <\/a>\n <a href=\"https:\/\/cortexorigin.com\/index.php\/easevolution\/#gouvernance\" class=\"drop-sim\">\n Gouvernance & trace de d\u00e9cision\n <span class=\"drop-sim-icon\">\u2197<\/span>\n <\/a>\n <a href=\"https:\/\/cortexorigin.com\/index.php\/easevolution\/#concurrence\" class=\"drop-sim\">\n Paysage concurrentiel\n <span class=\"drop-sim-icon\">\u2197<\/span>\n <\/a>\n <hr class=\"drop-sep\">\n <a href=\"https:\/\/cortexorigin.com\/index.php\/easevolution\/#contact\" class=\"drop-highlight\">\n Demander une cartographie\n <span class=\"drop-highlight-arrow\">\u2197<\/span>\n <\/a>\n <\/div>\n <\/div>\n \n <!-- AETZU ARROW AI (avec dropdown) -->\n <div class=\"menu-aetzu-wrap\">\n <a href=\"https:\/\/cortexorigin.com\/index.php\/aetzu-arrow-ai\/\" class=\"menu-aetzu\">\n AETZU ARROW AI\u2122\n <\/a>\n <div class=\"menu-dropdown menu-dropdown-aetzu\">\n <span class=\"drop-label\">AETZU ARROW AI<\/span>\n <a href=\"https:\/\/cortexorigin.com\/index.php\/aetzu-arrow-ai\/\" class=\"drop-sim\">\n AETZU ARROW AI\u2122 \u00b7 D\u00e9fense active\n <span class=\"drop-sim-icon\">\u2197<\/span>\n <\/a>\n <hr class=\"drop-sep\">\n <span class=\"drop-label\">Analyse strat\u00e9gique<\/span>\n <a href=\"https:\/\/cortexorigin.com\/index.php\/marche-et-positionnement-2\/\" class=\"drop-highlight\">\n March\u00e9 et positionnement\n <span class=\"drop-highlight-arrow\">\u2197<\/span>\n <\/a>\n <\/div>\n <\/div>\n \n <!-- WEB & API (avec dropdown) -->\n <div class=\"menu-webapi-wrap\">\n <a href=\"https:\/\/cortexorigin.com\/index.php\/cortex-idor\/\" class=\"menu-webapi\">\n WEB & API\n <\/a>\n <div class=\"menu-dropdown menu-dropdown-webapi\">\n <span class=\"drop-label\">Web & API<\/span>\n <a href=\"https:\/\/cortexorigin.com\/index.php\/cortex-idor\/\" class=\"drop-sim\">\n IDOR \u00b7 Passerelle d’autorisation\n <span class=\"drop-sim-icon\">\u2197<\/span>\n <\/a>\n <hr class=\"drop-sep\">\n <span class=\"drop-label\">Analyse strat\u00e9gique<\/span>\n <a href=\"https:\/\/cortexorigin.com\/index.php\/1689-2\/\" class=\"drop-highlight\">\n March\u00e9 et positionnement\n <span class=\"drop-highlight-arrow\">\u2197<\/span>\n <\/a>\n <\/div>\n <\/div>\n \n <!-- APP\u00c2T & LEURRE (avec dropdown \u2014 BAITS) -->\n <div class=\"menu-appat-wrap\">\n <a href=\"https:\/\/cortexorigin.com\/index.php\/appat-leurre-lanterne\/\" class=\"menu-appat\">\n APP\u00c2T & LEURRE\n <\/a>\n <div class=\"menu-dropdown menu-dropdown-appat\">\n <span class=\"drop-label\">Famille App\u00e2t & Leurre<\/span>\n <a href=\"https:\/\/cortexorigin.com\/index.php\/appat-leurre-lanterne\/\" class=\"drop-sim\">\n App\u00e2t & Leurre \u00b7 Vue d’ensemble\n <span class=\"drop-sim-icon\">\u2197<\/span>\n <\/a>\n <a href=\"https:\/\/cortexorigin.com\/index.php\/baist\/\" class=\"drop-highlight\">\n BAITS \u00b7 D\u00e9ception active\n <span class=\"drop-highlight-arrow\">\u2197<\/span>\n <\/a>\n <hr class=\"drop-sep\">\n <span class=\"drop-label\">Analyse strat\u00e9gique<\/span>\n <a href=\"https:\/\/cortexorigin.com\/index.php\/marche-positionnement\/\" class=\"drop-sim\">\n March\u00e9 & positionnement\n <span class=\"drop-sim-icon\">\u2197<\/span>\n <\/a>\n <\/div>\n <\/div>\n \n <!-- NK (avec dropdown) -->\n <div class=\"menu-cortexnk-wrap\">\n <a href=\"https:\/\/cortexorigin.com\/index.php\/cortex-nk\/\" class=\"menu-cortexnk\">\n NOYAU NK\n <\/a>\n <div class=\"menu-dropdown menu-dropdown-cortexnk\">\n <span class=\"drop-label\">Famille NK<\/span>\n <a href=\"https:\/\/cortexorigin.com\/index.php\/cortex-nk\/\" class=\"drop-sim\">\n NK \u00b7 Micronoyau souverain\n <span class=\"drop-sim-icon\">\u2197<\/span>\n <\/a>\n <a href=\"https:\/\/cortexorigin.com\/index.php\/cortex-nk-3d\/\" class=\"drop-highlight\">\n NK 3D \u00b7 Cybers\u00e9curit\u00e9 active\n <span class=\"drop-highlight-arrow\">\u2197<\/span>\n <\/a>\n <hr class=\"drop-sep\">\n <span class=\"drop-label\">Secure Boot<\/span>\n <a href=\"https:\/\/cortexorigin.com\/index.php\/cortex-nk-secure-boot\/\" class=\"drop-sim\">\n Secure Boot S1-S10 \u00b7 Module natif\n <span class=\"drop-sim-icon\">\u2197<\/span>\n <\/a>\n <a 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class=\"drop-highlight\">\n D\u00c9MONSTRATION NK\n <span class=\"drop-highlight-arrow\">\u2197<\/span>\n <\/a>\n <hr class=\"drop-sep\" style=\"margin:0.8rem 0 0.5rem\">\n <span class=\"drop-label\">Capacit\u00e9s mesur\u00e9es<\/span>\n <a href=\"https:\/\/cortexorigin.com\/index.php\/cryptographie\/\">Cryptographie<\/a>\n <a href=\"https:\/\/cortexorigin.com\/index.php\/secure-boot\/\">Secure Boot<\/a>\n <a href=\"https:\/\/cortexorigin.com\/index.php\/auto-containment-2\/\">Auto-Containment<\/a>\n <a href=\"https:\/\/cortexorigin.com\/index.php\/audit-log-immuable\/\">Audit Log Immuable<\/a>\n <a href=\"https:\/\/cortexorigin.com\/index.php\/attestation-et-orchestration-post-quantique\/\">Mesh v1<\/a>\n <hr class=\"drop-sep\" style=\"margin:0.8rem 0 0.5rem\">\n <span class=\"drop-label\">Tableaux de bord<\/span>\n <a href=\"https:\/\/cortexorigin.com\/index.php\/mttd-benchmark-v2-0-aetzu-arrow-ai\/\" class=\"drop-highlight\">\n MTTD Benchmark v2.0\n <span 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\n\n\n\n<hr class=\"wp-block-separator has-alpha-channel-opacity\"\/>\n\n\n\n<style>\n\/* ========== CORTEX NK SECURE BOOT \u2014 Styles d\u00e9di\u00e9s v2 ========== *\/\n.csb-fullwidth-wrapper { all: initial; display: block; }\n.csb-fullwidth-wrapper * { box-sizing: border-box; }\n.entry-title, .page-title, h1.wp-block-heading:first-child { display: none !important; }\n \n.cortex-sb-wrapper {\n width: 100vw; position: relative; left: 50%; transform: translateX(-50%);\n overflow-x: hidden;\n font-family: -apple-system, BlinkMacSystemFont, \"Segoe UI\", Helvetica, Arial, sans-serif;\n color: #E8EEF7; line-height: 1.6; -webkit-font-smoothing: antialiased; background: #F2EBDD;\n}\n.cortex-sb-wrapper * { box-sizing: border-box; }\n \n.csb-fullwidth-wrapper, .cortex-sb-wrapper {\n width: 100% !important; max-width: none !important;\n margin-left: 0 !important; margin-right: 0 !important;\n padding-left: 0 !important; padding-right: 0 !important;\n}\n.entry-content, .post-content, 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color: #4A5868; }\n.csb-disclaimer strong { color: #D4A551; font-weight: 600; }\n.csb-section-light .csb-disclaimer strong { color: #1A2842; }\n \n.csb-cta-band { background: #0A1A33; padding: 80px 24px; text-align: center; border-top: 1px solid rgba(212, 165, 81, 0.20); }\n.csb-cta-band .csb-eyebrow { color: #D4A551; }\n.csb-cta-title { font-family: \"Cormorant Garamond\", Georgia, serif; font-size: 44px; font-weight: 400; color: #FFFFFF; margin: 0 0 32px; }\n.csb-cta-buttons { display: flex; gap: 16px; justify-content: center; flex-wrap: wrap; }\n.csb-btn { display: inline-block; padding: 14px 32px; font-size: 13px; font-weight: 600; letter-spacing: 0.14em; text-transform: uppercase; text-decoration: none; border-radius: 2px; transition: background 0.2s ease, color 0.2s ease; }\n.csb-btn-primary { background: #D4A551; color: #0A1A33; border: 1px solid #D4A551; }\n.csb-btn-primary:hover { background: #E0B569; color: #0A1A33; }\n.csb-btn-secondary { background: transparent; color: #E8EEF7; border: 1px solid rgba(232, 238, 247, 0.3); }\n.csb-btn-secondary:hover { border-color: #D4A551; color: #D4A551; }\n \n@media (max-width: 768px) {\n .csb-title { font-size: 42px; }\n .csb-cta-title { font-size: 32px; }\n .csb-section-dark, .csb-section-light { padding: 64px 20px; }\n .csb-metric-value { font-size: 34px; }\n .csb-benchmark-table { font-size: 13px; }\n .csb-benchmark-table th, .csb-benchmark-table td { padding: 10px 8px; }\n .csb-bootchain-row { flex-direction: column; align-items: flex-start; }\n .csb-bootchain-step { font-size: 22px; }\n}\n<\/style>\n \n \n<div class=\"csb-fullwidth-wrapper\">\n<div class=\"cortex-sb-wrapper\">\n \n<!-- ========= SECTION 1 \u2014 HERO ========= -->\n<section class=\"csb-section-dark\">\n <div class=\"csb-container\">\n <div class=\"csb-eyebrow\">Module CORTEX NK\u2122 \u00b7 Secure Boot \u00b7 S1 \u2192 S10 \u00b7 v1.0-secboot-complete<\/div>\n <h1 class=\"csb-title\">Le d\u00e9marrage <em>cryptographiquement prouv\u00e9<\/em><\/h1>\n <p class=\"csb-signature\">Si le boot est compromis, tout le reste l’est. Cortex NK Secure Boot prouve l’inverse.<\/p>\n <p style=\"font-family: 'JetBrains Mono', monospace; font-size: 12px; letter-spacing: 0.12em; text-transform: uppercase; color: #D4A551; text-align: center; margin: -8px 0 28px; font-weight: 500;\">\n Premier module Secure Boot au monde combinant Ed25519 + ML-DSA-87 hybride + anti-rollback TPM 2.0 + recovery prouv\u00e9 formellement \u00b7 100% complet \u00b7 21 mai 2026\n <\/p>\n <p class=\"csb-subtitle\">\n Le Module Secure Boot CORTEX NK\u2122 garantit que la s\u00e9quence de d\u00e9marrage d’un syst\u00e8me critique\n est <em>math\u00e9matiquement prouv\u00e9e<\/em> \u00e0 chaque \u00e9tape \u2014 depuis la racine de confiance mat\u00e9rielle\n jusqu’au transfert vers l’ex\u00e9cution applicative. Dix sprints livr\u00e9s (S1-S10), 211 tests E2E PASS,\n v\u00e9rification multi-outils Frama-C\/WP + Isabelle\/HOL + CBMC. Signatures hybrides classiques et\n post-quantiques. Anti-rollback ancr\u00e9 dans le TPM 2.0. Recovery non-bypassable. Int\u00e9gration ATF\/BL2\n compatible ARM Trusted Firmware v2.10 LTS. <strong>Boot compos\u00e9 v\u00e9rifi\u00e9 en 0,55 ms \u00b7 boot orchestr\u00e9 end-to-end en 1,51 ms.<\/strong>\n <\/p>\n \n <div class=\"csb-hero-metrics\">\n <div class=\"csb-metric\">\n <p class=\"csb-metric-value\">10<span>\/10<\/span><\/p>\n <p class=\"csb-metric-label\">Sprints S1-S10 livr\u00e9s<\/p>\n <\/div>\n <div class=\"csb-metric\">\n <p class=\"csb-metric-value\">211<span>\/211<\/span><\/p>\n <p class=\"csb-metric-label\">Tests E2E PASS \u00b7 ASAN\/UBSAN<\/p>\n <\/div>\n <div class=\"csb-metric\">\n <p class=\"csb-metric-value\">0,55 <span>ms<\/span><\/p>\n <p class=\"csb-metric-label\">Boot compos\u00e9 v\u00e9rifi\u00e9 bout en bout<\/p>\n <\/div>\n <div class=\"csb-metric\">\n <p class=\"csb-metric-value\">1,51 <span>ms<\/span><\/p>\n <p class=\"csb-metric-label\">Boot orchestr\u00e9 end-to-end (S7)<\/p>\n <\/div>\n <div class=\"csb-metric\">\n <p class=\"csb-metric-value\">6<\/p>\n <p class=\"csb-metric-label\">Th\u00e9or\u00e8mes Isabelle\/HOL \u00b7 0 sorry<\/p>\n <\/div>\n <div class=\"csb-metric\">\n <p class=\"csb-metric-value\">92 <span>%<\/span><\/p>\n <p class=\"csb-metric-label\">Frama-C\/WP moyen \u00b7 347 CBMC checks<\/p>\n <\/div>\n <\/div>\n <\/div>\n<\/section>\n \n \n<!-- ========= SECTION 2 \u2014 POURQUOI ========= -->\n<section class=\"csb-section-light\">\n <div class=\"csb-container\">\n <div class=\"csb-eyebrow\">Pourquoi un module Secure Boot d\u00e9di\u00e9<\/div>\n <h2 class=\"csb-title\">Le maillon faible <em>de toute la cha\u00eene<\/em><\/h2>\n <p class=\"csb-subtitle\" style=\"color: #4A5868;\">\n Aucune v\u00e9rification formelle de l’OS, aucun chiffrement post-quantique, aucun confinement IA\n ne sert \u00e0 rien si le d\u00e9marrage du syst\u00e8me est compromis. Un attaquant qui ma\u00eetrise le boot\n ma\u00eetrise tout. Cinq menaces concr\u00e8tes \u2014 auxquelles aucun Secure Boot UEFI standard ne r\u00e9pond\n avec preuves formelles.\n <\/p>\n \n <div class=\"csb-card-grid\">\n <div class=\"csb-card csb-card-light\">\n <span class=\"csb-card-num\">01<\/span>\n <h3 class=\"csb-card-title\">Bootkit pr\u00e9-OS<\/h3>\n <p class=\"csb-card-text\">\n Un attaquant remplace le bootloader avant que l’antivirus ne s’active. Toute la confiance\n de l’OS est invalid\u00e9e. Secure Boot UEFI <em>standard<\/em> a \u00e9t\u00e9 contourn\u00e9 publiquement\n (BlackLotus, BootHole, BootGuard). Cortex NK v\u00e9rifie la signature <strong>hybride\n Ed25519 + ML-DSA-87<\/strong> \u00e0 chaque \u00e9tape, sans d\u00e9pendance \u00e0 Microsoft Pluton ni\n BootGuard Intel.\n <\/p>\n <p class=\"csb-card-tags\">BlackLotus \u00b7 BootHole \u00b7 Pluton<\/p>\n <\/div>\n \n <div class=\"csb-card csb-card-light\">\n <span class=\"csb-card-num\">02<\/span>\n <h3 class=\"csb-card-title\">Downgrade attack<\/h3>\n <p class=\"csb-card-text\">\n L’attaquant force le syst\u00e8me \u00e0 booter une version ancienne avec une vuln\u00e9rabilit\u00e9 connue.\n Le Module Secure Boot ancre la version courante dans le compteur monotone du TPM 2.0\n (S9 v1). Aucun downgrade possible \u2014 l’attaquant ne peut pas m\u00eame contourner via les\n retries (politique <strong>Option A STRICT<\/strong>).\n <\/p>\n <p class=\"csb-card-tags\">CVE downgrade \u00b7 Anti-rollback TPM<\/p>\n <\/div>\n \n <div class=\"csb-card csb-card-light\">\n <span class=\"csb-card-num\">03<\/span>\n <h3 class=\"csb-card-title\">Menace post-quantique<\/h3>\n <p class=\"csb-card-text\">\n Strat\u00e9gie <em>Harvest now, decrypt later<\/em>. Les signatures RSA et ECC de Secure Boot\n classique seront cassables d\u00e8s qu’un ordinateur quantique cryptographiquement pertinent\n existera. CORTEX NK utilise <strong>ML-DSA-87 (FIPS 204)<\/strong> en signature hybride\n avec Ed25519 \u2014 protection cumulative classique <em>et<\/em> post-quantique.\n <\/p>\n <p class=\"csb-card-tags\">FIPS 204 \u00b7 Hybride \u00b7 2030+<\/p>\n <\/div>\n \n <div class=\"csb-card csb-card-light\">\n <span class=\"csb-card-num\">04<\/span>\n <h3 class=\"csb-card-title\">Recovery d\u00e9tourn\u00e9<\/h3>\n <p class=\"csb-card-text\">\n Un attaquant active le mode recovery pour bypasser les contr\u00f4les. Cortex NK exige\n un appel <em>explicite<\/em> de l’op\u00e9rateur (politique <strong>Option A STRICT<\/strong>) \u2014\n jamais automatique sur \u00e9chec rollback. Compteur retries limit\u00e9 \u00e0 3, ancr\u00e9 dans le TPM NV.\n Audit complet de chaque tentative.\n <\/p>\n <p class=\"csb-card-tags\">Anti-bypass \u00b7 Recovery TPM NV<\/p>\n <\/div>\n \n <div class=\"csb-card csb-card-light\">\n <span class=\"csb-card-num\">05<\/span>\n <h3 class=\"csb-card-title\">Int\u00e9gration ATF \/ TF-A non v\u00e9rifi\u00e9e<\/h3>\n <p class=\"csb-card-text\">\n ARM Trusted Firmware (TF-A) prot\u00e8ge des milliards de devices ARM, sans aucune\n certification Common Criteria et sans preuves formelles. CORTEX NK livre un\n <strong>stub ATF\/BL2 v\u00e9rifi\u00e9 \u00e0 95,7 % Frama-C\/WP<\/strong> (S7), avec contrats ACSL\n complets sur l’interface BL2 \u2014 alignement EAL5 strict \/ EAL6 atteignable.\n <\/p>\n <p class=\"csb-card-tags\">TF-A v2.10 \u00b7 ATF\/BL2 prouv\u00e9<\/p>\n <\/div>\n <\/div>\n <\/div>\n<\/section>\n \n \n<!-- ========= SECTION 3 \u2014 CHAIN OF TRUST ========= -->\n<section class=\"csb-section-dark\">\n <div class=\"csb-container\">\n <div class=\"csb-eyebrow\">Architecture \u00b7 Cha\u00eene de confiance compl\u00e8te<\/div>\n <h2 class=\"csb-title\">De la <em>racine mat\u00e9rielle<\/em> \u00e0 l’<em>ex\u00e9cution applicative<\/em><\/h2>\n <p class=\"csb-subtitle\">\n Chaque \u00e9tape du d\u00e9marrage v\u00e9rifie cryptographiquement la suivante <em>avant<\/em> de lui c\u00e9der\n le contr\u00f4le. Aucune confiance n’est implicite. Chaque maillon est sign\u00e9, mesur\u00e9 dans le TPM,\n audit\u00e9, et son hash est \u00e9tendu dans un PCR d\u00e9di\u00e9. Si une \u00e9tape \u00e9choue, le boot s’arr\u00eate \u2014\n politique fail-closed absolue.\n <\/p>\n \n <div class=\"csb-bootchain\">\n <div class=\"csb-bootchain-row\">\n <div class=\"csb-bootchain-step\">BL1<\/div>\n <div class=\"csb-bootchain-content\">\n <p class=\"csb-bootchain-title\">Boot ROM (mat\u00e9riel)<\/p>\n <p class=\"csb-bootchain-desc\">Racine de confiance ancr\u00e9e dans le silicium. Charge BL2 depuis flash chiffr\u00e9.<\/p>\n <\/div>\n <\/div>\n <div class=\"csb-bootchain-arrow\">\u25bc<\/div>\n <div class=\"csb-bootchain-row\">\n <div class=\"csb-bootchain-step\">BL2<\/div>\n <div class=\"csb-bootchain-content\">\n <p class=\"csb-bootchain-title\">Secure Boot CORTEX NK (S1-S10)<\/p>\n <p class=\"csb-bootchain-desc\">V\u00e9rifie signature hybride Ed25519 + ML-DSA-87 (S1-S3) \u00b7 V\u00e9rifie manifest sign\u00e9 (S5) \u00b7 \u00c9tend PCR[2] dans TPM 2.0 (S4+S8) \u00b7 V\u00e9rifie anti-rollback NV (S9 v1) \u00b7 Politique recovery STRICT (S10 v1) \u00b7 Int\u00e9gration ATF v2.10 LTS (S7).<\/p>\n <\/div>\n <\/div>\n <div class=\"csb-bootchain-arrow\">\u25bc<\/div>\n <div class=\"csb-bootchain-row\">\n <div class=\"csb-bootchain-step\">BL31<\/div>\n <div class=\"csb-bootchain-content\">\n <p class=\"csb-bootchain-title\">EL3 Runtime (firmware s\u00e9curis\u00e9)<\/p>\n <p class=\"csb-bootchain-desc\">Bascule en mode EL3 ARM TrustZone. Initialise les services s\u00e9curis\u00e9s.<\/p>\n <\/div>\n <\/div>\n <div class=\"csb-bootchain-arrow\">\u25bc<\/div>\n <div class=\"csb-bootchain-row\">\n <div class=\"csb-bootchain-step\">BL33<\/div>\n <div class=\"csb-bootchain-content\">\n <p class=\"csb-bootchain-title\">OS \/ Hyperviseur<\/p>\n <p class=\"csb-bootchain-desc\">L’OS h\u00f4te d\u00e9marre uniquement si toute la cha\u00eene est valid\u00e9e. Sinon : halt.<\/p>\n <\/div>\n <\/div>\n <div class=\"csb-bootchain-arrow\">\u25bc<\/div>\n <div class=\"csb-bootchain-row\">\n <div class=\"csb-bootchain-step\">APP<\/div>\n <div class=\"csb-bootchain-content\">\n <p class=\"csb-bootchain-title\">Ex\u00e9cution applicative \u2014 CORTEX ORIGIN\u2122<\/p>\n <p class=\"csb-bootchain-desc\">Plateforme m\u00e9tier, IA, agents. La confiance est <em>maintenant<\/em> math\u00e9matiquement justifi\u00e9e.<\/p>\n <\/div>\n <\/div>\n <\/div>\n \n <div class=\"csb-disclaimer\">\n <strong>Principe fail-closed absolu.<\/strong> En cas d’\u00e9chec \u00e0 n’importe quelle \u00e9tape (signature\n invalide, PCR mismatch, rollback d\u00e9tect\u00e9), le syst\u00e8me s’arr\u00eate imm\u00e9diatement. Aucun mode d\u00e9grad\u00e9,\n aucune bascule automatique. Le recovery existe (S10 v1) mais doit \u00eatre d\u00e9clench\u00e9 explicitement\n par l’op\u00e9rateur via <code style=\"background:rgba(255,255,255,0.08); padding:1px 5px; border-radius:2px; font-size:0.9em;\">s7_bl2_request_recovery_boot()<\/code>.\n C’est la <strong>politique Option A STRICT<\/strong>, align\u00e9e sur la trajectoire EAL7 cible.\n <\/div>\n <\/div>\n<\/section>\n \n \n<!-- ========= SECTION 4 \u2014 10 SPRINTS ========= -->\n<section class=\"csb-section-light\">\n <div class=\"csb-container\">\n <div class=\"csb-eyebrow\">Dix sprints \u00b7 dix briques \u00b7 une seule preuve<\/div>\n <h2 class=\"csb-title\">Anatomie d’un Secure Boot <em>complet<\/em><\/h2>\n <p class=\"csb-subtitle\" style=\"color: #4A5868;\">\n Le module est livr\u00e9 sous forme de dix sprints ind\u00e9pendamment v\u00e9rifiables, int\u00e9gr\u00e9s progressivement\n sur la branche <code style=\"background: rgba(26,40,66,0.08); padding: 2px 6px; border-radius: 2px; font-size: 13px;\">master<\/code>\n du d\u00e9p\u00f4t cortex-wall. Chaque sprint a son p\u00e9rim\u00e8tre, ses contrats ACSL, ses tests E2E, son\n verdict Frama-C\/WP. Aucun raccourci. <strong>Tag v1.0-secboot-complete pouss\u00e9 le 21 mai 2026.<\/strong>\n <\/p>\n \n <div class=\"csb-sprint-grid\">\n \n <div class=\"csb-sprint\">\n <div class=\"csb-sprint-id\">S1<\/div>\n <p class=\"csb-sprint-name\">V\u00e9rification Ed25519<\/p>\n <p class=\"csb-sprint-tech\">HACL* \u00b7 F*\/Vale prouv\u00e9<\/p>\n <p class=\"csb-sprint-desc\">Signature classique elliptique sur courbe Curve25519. Robustesse 128 bits, v\u00e9rification rapide, int\u00e9gration HACL* INRIA prouv\u00e9e formellement.<\/p>\n <div class=\"csb-sprint-stats\">\n <div class=\"csb-sprint-stat\"><span class=\"csb-sprint-stat-val\">97 %<\/span><span class=\"csb-sprint-stat-lbl\">WP<\/span><\/div>\n <div class=\"csb-sprint-stat\"><span class=\"csb-sprint-stat-val\">10\/10<\/span><span class=\"csb-sprint-stat-lbl\">Tests<\/span><\/div>\n <div class=\"csb-sprint-stat\"><span class=\"csb-sprint-stat-val\">44,51 \u00b5s<\/span><span class=\"csb-sprint-stat-lbl\">Mean<\/span><\/div>\n <\/div>\n <\/div>\n \n <div class=\"csb-sprint\">\n <div class=\"csb-sprint-id\">S2<\/div>\n <p class=\"csb-sprint-name\">V\u00e9rification ML-DSA-87<\/p>\n <p class=\"csb-sprint-tech\">liboqs \u00b7 FIPS 204 \u00b7 PQC<\/p>\n <p class=\"csb-sprint-desc\">Signature post-quantique standard NIST. S\u00e9curit\u00e9 niveau L5 (r\u00e9sistance \u00e9quivalente AES-256). Robustesse contre les futurs ordinateurs quantiques.<\/p>\n <div class=\"csb-sprint-stats\">\n <div class=\"csb-sprint-stat\"><span class=\"csb-sprint-stat-val\">97,2 %<\/span><span class=\"csb-sprint-stat-lbl\">WP<\/span><\/div>\n <div class=\"csb-sprint-stat\"><span class=\"csb-sprint-stat-val\">18\/18<\/span><span class=\"csb-sprint-stat-lbl\">Tests<\/span><\/div>\n <div class=\"csb-sprint-stat\"><span class=\"csb-sprint-stat-val\">129,51 \u00b5s<\/span><span class=\"csb-sprint-stat-lbl\">Mean<\/span><\/div>\n <\/div>\n <\/div>\n \n <div class=\"csb-sprint\">\n <div class=\"csb-sprint-id\">S3<\/div>\n <p class=\"csb-sprint-name\">Signature hybride<\/p>\n <p class=\"csb-sprint-tech\">Ed25519 + ML-DSA-87 \u00b7 4691 B<\/p>\n <p class=\"csb-sprint-desc\">Combinaison cumulative \u2014 l’attaque doit casser <em>les deux<\/em> sch\u00e9mas. Format de signature 4691 octets, cl\u00e9 publique hybride 2624 octets.<\/p>\n <div class=\"csb-sprint-stats\">\n <div class=\"csb-sprint-stat\"><span class=\"csb-sprint-stat-val\">97,1 %<\/span><span class=\"csb-sprint-stat-lbl\">WP<\/span><\/div>\n <div class=\"csb-sprint-stat\"><span class=\"csb-sprint-stat-val\">24\/24<\/span><span class=\"csb-sprint-stat-lbl\">Tests<\/span><\/div>\n <div class=\"csb-sprint-stat\"><span class=\"csb-sprint-stat-val\">174,84 \u00b5s<\/span><span class=\"csb-sprint-stat-lbl\">Mean<\/span><\/div>\n <\/div>\n <\/div>\n \n <div class=\"csb-sprint\">\n <div class=\"csb-sprint-id\">S4<\/div>\n <p class=\"csb-sprint-name\">TPM PCR extension<\/p>\n <p class=\"csb-sprint-tech\">SHA-256 stub RAM \u00b7 24 PCRs \u00b7 TPM 2.0<\/p>\n <p class=\"csb-sprint-desc\">Extension cryptographique des Platform Configuration Registers. Chaque mesure est SHA-256 du pr\u00e9c\u00e9dent || nouveau hash, accumulation irr\u00e9versible.<\/p>\n <div class=\"csb-sprint-stats\">\n <div class=\"csb-sprint-stat\"><span class=\"csb-sprint-stat-val\">100 %<\/span><span class=\"csb-sprint-stat-lbl\">WP<\/span><\/div>\n <div class=\"csb-sprint-stat\"><span class=\"csb-sprint-stat-val\">11\/11<\/span><span class=\"csb-sprint-stat-lbl\">Tests<\/span><\/div>\n <div class=\"csb-sprint-stat\"><span class=\"csb-sprint-stat-val\">370 ns<\/span><span class=\"csb-sprint-stat-lbl\">Mean<\/span><\/div>\n <\/div>\n <\/div>\n \n <div class=\"csb-sprint\">\n <div class=\"csb-sprint-id\">S5<\/div>\n <p class=\"csb-sprint-name\">Manifest sign\u00e9<\/p>\n <p class=\"csb-sprint-tech\">struct 4955 B \u00b7 hybride S3<\/p>\n <p class=\"csb-sprint-desc\">Manifest de boot sign\u00e9 hybride contenant les PCR attendus, la version firmware, le hash de chaque image. V\u00e9rification de coh\u00e9rence PCR avec TPM r\u00e9el.<\/p>\n <div class=\"csb-sprint-stats\">\n <div class=\"csb-sprint-stat\"><span class=\"csb-sprint-stat-val\">93,2 %<\/span><span class=\"csb-sprint-stat-lbl\">WP<\/span><\/div>\n <div class=\"csb-sprint-stat\"><span class=\"csb-sprint-stat-val\">8\/8<\/span><span class=\"csb-sprint-stat-lbl\">Tests<\/span><\/div>\n <div class=\"csb-sprint-stat\"><span class=\"csb-sprint-stat-val\">1 ns<\/span><span class=\"csb-sprint-stat-lbl\">Mean<\/span><\/div>\n <\/div>\n <\/div>\n \n <div class=\"csb-sprint\">\n <div class=\"csb-sprint-id\">S6<\/div>\n <p class=\"csb-sprint-name\">Th\u00e9or\u00e8mes Isabelle\/HOL<\/p>\n <p class=\"csb-sprint-tech\">HOL \u00b7 6 th\u00e9or\u00e8mes \u00b7 0 sorry<\/p>\n <p class=\"csb-sprint-desc\">Preuves math\u00e9matiques formelles des invariants de Secure Boot. Aucun sorry (axiome non d\u00e9montr\u00e9). Standard acad\u00e9mique mondial pour syst\u00e8mes critiques.<\/p>\n <div class=\"csb-sprint-stats\">\n <div class=\"csb-sprint-stat\"><span class=\"csb-sprint-stat-val\">6\/6<\/span><span class=\"csb-sprint-stat-lbl\">Th\u00e9or\u00e8mes<\/span><\/div>\n <div class=\"csb-sprint-stat\"><span class=\"csb-sprint-stat-val\">0<\/span><span class=\"csb-sprint-stat-lbl\">Sorry<\/span><\/div>\n <\/div>\n <\/div>\n \n <div class=\"csb-sprint\">\n <div class=\"csb-sprint-id\">S7<\/div>\n <p class=\"csb-sprint-name\">Int\u00e9gration ATF\/BL2<\/p>\n <p class=\"csb-sprint-tech\">TF-A v2.10 LTS \u00b7 qemu virt<\/p>\n <p class=\"csb-sprint-desc\">Stub ATF\/BL2 reproduisant l’API de l’ARM Trusted Firmware. 16 tests E2E, contrats ACSL complets, politique Option A STRICT. Sprint \u00e0 95,7 % WP.<\/p>\n <div class=\"csb-sprint-stats\">\n <div class=\"csb-sprint-stat\"><span class=\"csb-sprint-stat-val\">95,7 %<\/span><span class=\"csb-sprint-stat-lbl\">WP<\/span><\/div>\n <div class=\"csb-sprint-stat\"><span class=\"csb-sprint-stat-val\">16\/16<\/span><span class=\"csb-sprint-stat-lbl\">Tests<\/span><\/div>\n <div class=\"csb-sprint-stat\"><span class=\"csb-sprint-stat-val\">962 \u00b5s<\/span><span class=\"csb-sprint-stat-lbl\">Mean<\/span><\/div>\n <\/div>\n <\/div>\n \n <div class=\"csb-sprint\">\n <div class=\"csb-sprint-id\">S8<\/div>\n <p class=\"csb-sprint-name\">TPM 2.0 r\u00e9el<\/p>\n <p class=\"csb-sprint-tech\">TSS2 \u00b7 swtpm + hardware<\/p>\n <p class=\"csb-sprint-desc\">Int\u00e9gration TPM 2.0 standard TCG via tpm2-tss. Deux backends : swtpm pour dev\/test, TPM hardware EAL4+ pour production. Cycle complet init \/ extend \/ shutdown.<\/p>\n <div class=\"csb-sprint-stats\">\n <div class=\"csb-sprint-stat\"><span class=\"csb-sprint-stat-val\">86,6 %<\/span><span class=\"csb-sprint-stat-lbl\">WP<\/span><\/div>\n <div class=\"csb-sprint-stat\"><span class=\"csb-sprint-stat-val\">22\/22<\/span><span class=\"csb-sprint-stat-lbl\">Tests<\/span><\/div>\n <div class=\"csb-sprint-stat\"><span class=\"csb-sprint-stat-val\">370,83 \u00b5s<\/span><span class=\"csb-sprint-stat-lbl\">Mean<\/span><\/div>\n <\/div>\n <\/div>\n \n <div class=\"csb-sprint\">\n <div class=\"csb-sprint-id\">S9<\/div>\n <p class=\"csb-sprint-name\">Anti-rollback NV<\/p>\n <p class=\"csb-sprint-tech\">TPM NV index 0x01000010<\/p>\n <p class=\"csb-sprint-desc\">Compteur monotone ancr\u00e9 dans le TPM NV. La version firmware courante est verrouill\u00e9e comme minimum. Aucun downgrade possible \u2014 m\u00eame avec acc\u00e8s physique au flash. Architecture cold\/hot path : init NV_Read 1,28 ms au boot, checks runtime 2 ns (cache RAM).<\/p>\n <div class=\"csb-sprint-stats\">\n <div class=\"csb-sprint-stat\"><span class=\"csb-sprint-stat-val\">84,2 %<\/span><span class=\"csb-sprint-stat-lbl\">WP<\/span><\/div>\n <div class=\"csb-sprint-stat\"><span class=\"csb-sprint-stat-val\">22\/22<\/span><span class=\"csb-sprint-stat-lbl\">Tests<\/span><\/div>\n <div class=\"csb-sprint-stat\"><span class=\"csb-sprint-stat-val\">2 ns \/ 1,28 ms<\/span><span class=\"csb-sprint-stat-lbl\">Hot\/Cold<\/span><\/div>\n <\/div>\n <\/div>\n \n <div class=\"csb-sprint\">\n <div class=\"csb-sprint-id\">S10<\/div>\n <p class=\"csb-sprint-name\">Recovery TPM NV<\/p>\n <p class=\"csb-sprint-tech\">NV index 0x01000020 \u00b7 max 3<\/p>\n <p class=\"csb-sprint-desc\">Compteur retries ancr\u00e9 TPM NV. Maximum 3 tentatives recovery. Reset uniquement apr\u00e8s boot nominal r\u00e9ussi. Politique Option A STRICT : jamais automatique. Architecture cold\/hot path : init NV_Read 764 \u00b5s au boot, checks runtime 2 ns (cache RAM).<\/p>\n <div class=\"csb-sprint-stats\">\n <div class=\"csb-sprint-stat\"><span class=\"csb-sprint-stat-val\">83,6 %<\/span><span class=\"csb-sprint-stat-lbl\">WP<\/span><\/div>\n <div class=\"csb-sprint-stat\"><span class=\"csb-sprint-stat-val\">14\/14<\/span><span class=\"csb-sprint-stat-lbl\">Tests<\/span><\/div>\n <div class=\"csb-sprint-stat\"><span class=\"csb-sprint-stat-val\">2 ns \/ 764 \u00b5s<\/span><span class=\"csb-sprint-stat-lbl\">Hot\/Cold<\/span><\/div>\n <\/div>\n <\/div>\n \n <\/div>\n \n <div class=\"csb-disclaimer\">\n <strong>Total cumul\u00e9.<\/strong> 211 tests E2E PASS sous ASAN\/UBSAN, score Frama-C\/WP moyen\n \u2248 92 % (83,6 % min sur S10 v1 \u2192 100 % max sur S4 v1), 6 th\u00e9or\u00e8mes Isabelle\/HOL prouv\u00e9s sans\n sorry, 347 v\u00e9rifications CBMC sans failure. Tous les sprints sont merg\u00e9s sur la branche\n <code style=\"background: rgba(74,120,176,0.08); padding: 1px 5px; border-radius: 2px;\">master<\/code>\n du d\u00e9p\u00f4t priv\u00e9 cortex-wall (PR #15 pour S7 ATF\/BL2, PR #16 pour bench v4 complet, tag <code style=\"background: rgba(74,120,176,0.08); padding: 1px 5px; border-radius: 2px;\">v1.0-secboot-complete<\/code> pouss\u00e9 le 21 mai 2026).\n <\/div>\n <\/div>\n<\/section>\n \n \n<!-- ========= SECTION 5 \u2014 3 MODES ========= -->\n<section class=\"csb-section-dark\">\n <div class=\"csb-container\">\n <div class=\"csb-eyebrow\">Int\u00e9gration \u00b7 trois niveaux<\/div>\n <h2 class=\"csb-title\">Trois <em>modes de d\u00e9ploiement<\/em><\/h2>\n <p class=\"csb-subtitle\">\n Le Module Secure Boot s’int\u00e8gre selon trois modes, du plus simple (validation runtime c\u00f4t\u00e9 OS)\n au plus strict (remplacement int\u00e9gral du bootloader). Tous trois sont d\u00e9j\u00e0 valid\u00e9s en POC.\n <\/p>\n \n <div class=\"csb-card-grid\">\n <div class=\"csb-card\">\n <span class=\"csb-card-num\">A<\/span>\n <h3 class=\"csb-card-title\">Mode validation runtime<\/h3>\n <p class=\"csb-card-text\">\n Le module s’ex\u00e9cute apr\u00e8s le boot, comme service de v\u00e9rification de l’int\u00e9grit\u00e9 du\n chargement. Compatible avec UEFI \/ GRUB \/ U-Boot existant. Mesure les binaires charg\u00e9s,\n v\u00e9rifie signatures, alimente PCRs. <strong>Aucun changement infrastructure.<\/strong>\n Recommand\u00e9 pour premi\u00e8re int\u00e9gration.\n <\/p>\n <p class=\"csb-card-tags\">UEFI \u00b7 GRUB \u00b7 Audit<\/p>\n <\/div>\n \n <div class=\"csb-card\">\n <span class=\"csb-card-num\">B<\/span>\n <h3 class=\"csb-card-title\">Mode bootloader compl\u00e9mentaire<\/h3>\n <p class=\"csb-card-text\">\n Le module remplace BL2 dans l’ARM Trusted Firmware. Compatible TF-A v2.10 LTS.\n API \u00e9mul\u00e9e c\u00f4t\u00e9 stub, v\u00e9rifications r\u00e9elles c\u00f4t\u00e9 CORTEX NK. Recommand\u00e9 pour syst\u00e8mes\n embarqu\u00e9s ARM (drones, automotive, IoT industriel).\n <\/p>\n <p class=\"csb-card-tags\">TF-A \u00b7 BL2 \u00b7 ARM<\/p>\n <\/div>\n \n <div class=\"csb-card\">\n <span class=\"csb-card-num\">C<\/span>\n <h3 class=\"csb-card-title\">Mode racine de confiance compl\u00e8te<\/h3>\n <p class=\"csb-card-text\">\n Le module est la racine de confiance, sans d\u00e9pendance \u00e0 UEFI ni TF-A. Boot ROM \u2192\n CORTEX NK Secure Boot \u2192 OS s\u00e9curis\u00e9. R\u00e9serv\u00e9 aux environnements \u00e0 plus haut niveau\n d’assurance (d\u00e9fense, gouvernement, ANSSI).\n <\/p>\n <p class=\"csb-card-tags\">DGA \u00b7 ANSSI \u00b7 EAL6+<\/p>\n <\/div>\n <\/div>\n \n <div class=\"csb-disclaimer\">\n <strong>Trajectoire commerciale conseill\u00e9e.<\/strong> D\u00e9marrer en mode A (validation runtime,\n pas de remplacement bootloader), puis \u00e9voluer vers le mode B sur les \u00e9quipements ARM d\u00e9di\u00e9s,\n puis vers le mode C sur les plateformes les plus sensibles. Cette progression permet de\n s\u00e9curiser le d\u00e9ploiement initial tout en construisant la trajectoire de certification.\n <\/div>\n <\/div>\n<\/section>\n \n \n<!-- ========= SECTION 6 \u2014 PERFORMANCES MESUR\u00c9ES ========= -->\n<section class=\"csb-section-light\">\n <div class=\"csb-container\">\n <div class=\"csb-eyebrow\">Performances \u00b7 mesures evidence-grade \u00b7 CFVL-BENCH-SECBOOT-001 v2.0<\/div>\n <h2 class=\"csb-title\">La s\u00e9curit\u00e9 <em>sans la latence<\/em><\/h2>\n <p class=\"csb-subtitle\" style=\"color: #4A5868;\">\n <strong>Boot compos\u00e9 v\u00e9rifi\u00e9 en 0,55 ms \u00b7 boot orchestr\u00e9 end-to-end en 1,51 ms<\/strong> \u2014\n signature hybride post-quantique (Ed25519 + ML-DSA-87) + manifest + extension PCR dans TPM 2.0 r\u00e9el\n + anti-rollback NV cumul\u00e9s. Mesures r\u00e9elles sur ARM64 Apple Silicon M2, m\u00e9thodologie evidence-grade\n reproductible <strong>CFVL-BENCH-SECBOOT-001 v2.0<\/strong>. Test vectors VALIDES g\u00e9n\u00e9r\u00e9s avec\n HACL* (Ed25519) et liboqs (ML-DSA-87), autotest signature hybride <code style=\"background:rgba(26,40,66,0.08); padding:1px 5px; border-radius:2px; font-size:0.9em;\">VALID (rc=0)<\/code>\n au d\u00e9marrage du bench. <strong>Architecture cold\/hot path document\u00e9e :<\/strong> init TPM_NV ~800 \u00b5s au boot,\n checks runtime ~2 ns (cache RAM).\n <\/p>\n \n <table class=\"csb-benchmark-table\">\n <thead>\n <tr>\n <th>Op\u00e9ration<\/th>\n <th>Sprint<\/th>\n <th style=\"text-align: right;\">Mean<\/th>\n <th style=\"text-align: right;\">p99<\/th>\n <\/tr>\n <\/thead>\n <tbody>\n <tr>\n <td><strong>V\u00e9rification Ed25519<\/strong><br><span style=\"font-size:12px; color:#6A7588; font-style:italic;\">Signature classique \u00b7 HACL* F*\/Vale \u00b7 cl\u00e9+sig r\u00e9els<\/span><\/td>\n <td class=\"csb-mono\">S1<\/td>\n <td class=\"csb-num csb-num-hi\" style=\"color:#B8862F;\">44,51 \u00b5s<\/td>\n <td class=\"csb-num\">70,53 \u00b5s<\/td>\n <\/tr>\n <tr>\n <td><strong>V\u00e9rification ML-DSA-87<\/strong><br><span style=\"font-size:12px; color:#6A7588; font-style:italic;\">Signature post-quantique \u00b7 liboqs FIPS 204 \u00b7 cl\u00e9+sig r\u00e9els<\/span><\/td>\n <td class=\"csb-mono\">S2<\/td>\n <td class=\"csb-num csb-num-hi\" style=\"color:#B8862F;\">129,51 \u00b5s<\/td>\n <td class=\"csb-num\">138,70 \u00b5s<\/td>\n <\/tr>\n <tr>\n <td><strong>V\u00e9rification hybride compl\u00e8te<\/strong><br><span style=\"font-size:12px; color:#6A7588; font-style:italic;\">Ed25519 + ML-DSA-87 cumulatifs \u00b7 branch-free secure<\/span><\/td>\n <td class=\"csb-mono\">S3<\/td>\n <td class=\"csb-num csb-num-hi\" style=\"color:#B8862F;\">174,84 \u00b5s<\/td>\n <td class=\"csb-num\">191,71 \u00b5s<\/td>\n <\/tr>\n <tr>\n <td><strong>TPM PCR extend (stub RAM)<\/strong><br><span style=\"font-size:12px; color:#6A7588; font-style:italic;\">SHA-256 du pr\u00e9c\u00e9dent \u2a01 nouveau \u00b7 mesure d\u00e9di\u00e9e<\/span><\/td>\n <td class=\"csb-mono\">S4<\/td>\n <td class=\"csb-num csb-num-hi\" style=\"color:#B8862F;\">370 ns<\/td>\n <td class=\"csb-num\">377 ns<\/td>\n <\/tr>\n <tr>\n <td><strong>Manifest verify (signature + PCRs)<\/strong><br><span style=\"font-size:12px; color:#6A7588; font-style:italic;\">struct packed 4955 B \u00b7 coh\u00e9rence PCR \u00b7 sub-\u00b5s (plancher clock)<\/span><\/td>\n <td class=\"csb-mono\">S5<\/td>\n <td class=\"csb-num csb-num-hi\" style=\"color:#B8862F;\">1 ns<\/td>\n <td class=\"csb-num\">2 ns<\/td>\n <\/tr>\n <tr>\n <td><strong>TPM 2.0 extend (r\u00e9el TSS2)<\/strong><br><span style=\"font-size:12px; color:#6A7588; font-style:italic;\">Backend swtpm local \u00b7 TPM hardware production \u2248 \u00d73-5<\/span><\/td>\n <td class=\"csb-mono\">S8<\/td>\n <td class=\"csb-num csb-num-hi\" style=\"color:#B8862F;\">370,83 \u00b5s<\/td>\n <td class=\"csb-num\">477,58 \u00b5s<\/td>\n <\/tr>\n <tr>\n <td><strong>Rollback check (STUB_RAM)<\/strong><br><span style=\"font-size:12px; color:#6A7588; font-style:italic;\">Backend dev\/test \u00b7 plancher r\u00e9solution clock<\/span><\/td>\n <td class=\"csb-mono\">S9 v0<\/td>\n <td class=\"csb-num csb-num-hi\" style=\"color:#B8862F;\">2 ns<\/td>\n <td class=\"csb-num\">2 ns<\/td>\n <\/tr>\n <tr>\n <td><strong>Rollback check (TPM_NV hot path)<\/strong><br><span style=\"font-size:12px; color:#6A7588; font-style:italic;\">Backend production \u00b7 index NV 0x01000010 \u00b7 cache RAM runtime<\/span><\/td>\n <td class=\"csb-mono\">S9 v1<\/td>\n <td class=\"csb-num csb-num-hi\" style=\"color:#B8862F;\">2 ns<\/td>\n <td class=\"csb-num\">2 ns<\/td>\n <\/tr>\n <tr>\n <td><strong>Rollback init (TPM_NV cold path)<\/strong><br><span style=\"font-size:12px; color:#6A7588; font-style:italic;\">Backend production \u00b7 tcti+Esys+NV_Read swtpm au boot<\/span><\/td>\n <td class=\"csb-mono\">S9 init<\/td>\n <td class=\"csb-num csb-num-hi\" style=\"color:#B8862F;\">1,28 ms<\/td>\n <td class=\"csb-num\">1,93 ms<\/td>\n <\/tr>\n <tr>\n <td><strong>Recovery check (STUB_RAM)<\/strong><br><span style=\"font-size:12px; color:#6A7588; font-style:italic;\">Backend dev\/test \u00b7 plancher r\u00e9solution clock<\/span><\/td>\n <td class=\"csb-mono\">S10 v0<\/td>\n <td class=\"csb-num csb-num-hi\" style=\"color:#B8862F;\">2 ns<\/td>\n <td class=\"csb-num\">2 ns<\/td>\n <\/tr>\n <tr>\n <td><strong>Recovery check (TPM_NV hot path)<\/strong><br><span style=\"font-size:12px; color:#6A7588; font-style:italic;\">Backend production \u00b7 index NV 0x01000020 \u00b7 cache RAM runtime<\/span><\/td>\n <td class=\"csb-mono\">S10 v1<\/td>\n <td class=\"csb-num csb-num-hi\" style=\"color:#B8862F;\">2 ns<\/td>\n <td class=\"csb-num\">2 ns<\/td>\n <\/tr>\n <tr>\n <td><strong>Recovery init (TPM_NV cold path)<\/strong><br><span style=\"font-size:12px; color:#6A7588; font-style:italic;\">Backend production \u00b7 tcti+Esys+NV_Read swtpm au boot<\/span><\/td>\n <td class=\"csb-mono\">S10 init<\/td>\n <td class=\"csb-num csb-num-hi\" style=\"color:#B8862F;\">764 \u00b5s<\/td>\n <td class=\"csb-num\">980 \u00b5s<\/td>\n <\/tr>\n <tr>\n <td><strong>s7_bl2_init orchestration<\/strong><br><span style=\"font-size:12px; color:#6A7588; font-style:italic;\">Init complet ATF\/BL2 (S1+S5+S8+S9+S10) cha\u00een\u00e9s<\/span><\/td>\n <td class=\"csb-mono\">S7<\/td>\n <td class=\"csb-num csb-num-hi\" style=\"color:#B8862F;\">962 \u00b5s<\/td>\n <td class=\"csb-num\">1,10 ms<\/td>\n <\/tr>\n <tr style=\"background: rgba(212,165,81,0.08); border-top: 2px solid rgba(212,165,81,0.4);\">\n <td><strong>BOOT COMPOS\u00c9 (cha\u00eene crypto)<\/strong><br><span style=\"font-size:12px; color:#6A7588; font-style:italic;\">S3 + S4 + S5 + S8 + S9 v0 + S10 v0 cumul\u00e9s \u00b7 perf intrins\u00e8que<\/span><\/td>\n <td class=\"csb-mono\">S1-S10<\/td>\n <td class=\"csb-num csb-num-hi\" style=\"color:#B8862F; font-weight:700; font-size:15px;\">\u2248 0,55 ms<\/td>\n <td class=\"csb-num\" style=\"font-weight:700;\">\u2248 0,70 ms<\/td>\n <\/tr>\n <tr style=\"background: rgba(212,165,81,0.12); border-top: 1px solid rgba(212,165,81,0.4);\">\n <td><strong>BOOT ORCHESTR\u00c9 END-TO-END (S7)<\/strong><br><span style=\"font-size:12px; color:#6A7588; font-style:italic;\">s7_bl2_init complet \u00b7 setup TPM init\/shutdown \u00b7 perf production<\/span><\/td>\n <td class=\"csb-mono\">S7<\/td>\n <td class=\"csb-num csb-num-hi\" style=\"color:#B8862F; font-weight:700; font-size:15px;\">\u2248 1,51 ms<\/td>\n <td class=\"csb-num\" style=\"font-weight:700;\">\u2248 1,80 ms<\/td>\n <\/tr>\n <\/tbody>\n <\/table>\n \n <div class=\"csb-disclaimer\">\n <strong>M\u00e9thodologie evidence-grade.<\/strong> Plateforme ARM64 Apple Silicon M2 \u00b7 clang -O2 \u00b7\n <code style=\"background:rgba(26,40,66,0.08); padding:1px 5px; border-radius:2px; font-size:0.9em;\">CLOCK_MONOTONIC_RAW<\/code>\n r\u00e9solution nanoseconde \u00b7 N et batch <em>adapt\u00e9s par op\u00e9ration<\/em> (latence variable du ns au ms) \u00b7\n <code style=\"background:rgba(26,40,66,0.08); padding:1px 5px; border-radius:2px; font-size:0.9em;\">noinline + barrier + sink volatile<\/code> (anti-DCE compilateur) \u00b7\n test vectors VALIDES g\u00e9n\u00e9r\u00e9s avec vraies cl\u00e9s HACL* + liboqs \u00b7 autotest signature hybride\n <code style=\"background:rgba(26,40,66,0.08); padding:1px 5px; border-radius:2px; font-size:0.9em;\">VALID<\/code> \u00b7 backend swtpm IBM pour S8 (TPM hardware production\n attendu \u2248 \u00d73-5). <strong>Rapport CFVL-BENCH-SECBOOT-001 v2.0<\/strong> \u00b7 code source reproductible\n sur d\u00e9p\u00f4t cortex-wall (PR #16 merg\u00e9e master, tag <code style=\"background:rgba(26,40,66,0.08); padding:1px 5px; border-radius:2px; font-size:0.9em;\">v1.0-secboot-complete<\/code>).\n <strong>Architecture cold\/hot path :<\/strong> les inits TPM_NV au boot co\u00fbtent ~800 \u00b5s \u00e0 1,3 ms (NV_Read r\u00e9el via tcti+Esys),\n les checks runtime sont en cache RAM \u00e0 2 ns. Validation ind\u00e9pendante <strong>ATE_IND.2 CESTI Q3 2026<\/strong>\n sur plateforme cible ARM physique. <strong>Sprint Module Secure Boot 100% complet \u00b7 21 mai 2026.<\/strong>\n <\/div>\n <\/div>\n<\/section>\n \n \n<!-- ========= SECTION 7 \u2014 V\u00c9RIFICATION MULTI-OUTILS ========= -->\n<section class=\"csb-section-dark\">\n <div class=\"csb-container\">\n <div class=\"csb-eyebrow\">V\u00e9rification multi-outils \u00b7 evidence CESTI<\/div>\n <h2 class=\"csb-title\">Trois preuves <em>ind\u00e9pendantes<\/em><\/h2>\n <p class=\"csb-subtitle\">\n Chaque sprint est v\u00e9rifi\u00e9 par trois outils compl\u00e9mentaires, qui se contr\u00f4lent mutuellement.\n Aucune erreur d’un outil ne peut passer si les deux autres d\u00e9tectent l’incoh\u00e9rence. Standard\n d’\u00e9vidence le plus exigeant pour syst\u00e8mes critiques EAL6\/EAL7.\n <\/p>\n \n <div class=\"csb-card-grid\">\n <div class=\"csb-card\">\n <span class=\"csb-card-icon\">\ud83d\udd12<\/span>\n <h3 class=\"csb-card-title\">Frama-C \/ WP<\/h3>\n <p class=\"csb-card-text\">\n V\u00e9rification d\u00e9ductive des contrats ACSL. Pour chaque fonction du Secure Boot, les\n pr\u00e9conditions, postconditions et behaviors sont prouv\u00e9s via les solveurs SMT\n Alt-Ergo 2.6 et Z3 4.13. Score moyen \u2248 92 %, max 100 % (S4 v1), min 83,6 % (S10 v1).\n <\/p>\n <p class=\"csb-card-tags\">CEA Paris-Saclay \u00b7 Alt-Ergo \u00b7 Z3<\/p>\n <\/div>\n \n <div class=\"csb-card\">\n <span class=\"csb-card-icon\">\ud83d\udcd0<\/span>\n <h3 class=\"csb-card-title\">Isabelle\/HOL<\/h3>\n <p class=\"csb-card-text\">\n Preuves math\u00e9matiques formelles des invariants de s\u00e9curit\u00e9. 6 th\u00e9or\u00e8mes prouv\u00e9s\n sans sorry (axiome non d\u00e9montr\u00e9). Standard acad\u00e9mique mondial \u2014 utilis\u00e9 pour seL4,\n Genode, CompCert. Module S6 d\u00e9di\u00e9 \u00e0 la formalisation HOL du Secure Boot.\n <\/p>\n <p class=\"csb-card-tags\">University of Cambridge \u00b7 TU Munich<\/p>\n <\/div>\n \n <div class=\"csb-card\">\n <span class=\"csb-card-icon\">\ud83d\udd2c<\/span>\n <h3 class=\"csb-card-title\">CBMC<\/h3>\n <p class=\"csb-card-text\">\n Model checking born\u00e9 du code C. V\u00e9rifie 347 propri\u00e9t\u00e9s (overflow, underflow, acc\u00e8s\n m\u00e9moire invalide, division par z\u00e9ro, d\u00e9passements de tableaux). Aucune failure\n d\u00e9tect\u00e9e. Outil officiel de l’Universit\u00e9 d’Oxford, utilis\u00e9 chez Amazon (S3) et Diffblue.\n <\/p>\n <p class=\"csb-card-tags\">Oxford \u00b7 Amazon \u00b7 Diffblue<\/p>\n <\/div>\n <\/div>\n \n <p style=\"text-align: center; font-size: 17px; color: #E8EEF7; margin: 48px 0 0; font-weight: 600;\">\n Trois outils. Trois preuves. <span style=\"color: #D4A551;\">Z\u00e9ro angle mort.<\/span>\n <\/p>\n <\/div>\n<\/section>\n \n \n<!-- ========= SECTION 8 \u2014 TABLEAU CONCURRENTIEL ========= -->\n<section class=\"csb-section-light\">\n <div class=\"csb-container\">\n <div class=\"csb-eyebrow\">Benchmark concurrentiel \u00b7 7 acteurs mondiaux<\/div>\n <h2 class=\"csb-title\">Pourquoi pas <em>les autres<\/em><\/h2>\n <p class=\"csb-subtitle\" style=\"color: #4A5868;\">\n Sept Secure Boot compar\u00e9s sur dix crit\u00e8res. CORTEX NK Secure Boot est le seul \u00e0 combiner\n <strong>signatures hybrides classiques + post-quantiques<\/strong>, v\u00e9rification formelle\n multi-outils, anti-rollback ancr\u00e9 TPM 2.0, recovery non-bypassable Option A STRICT, et\n souverainet\u00e9 fran\u00e7aise compl\u00e8te.\n <\/p>\n \n <table class=\"csb-benchmark-table csb-comp-table\">\n <thead>\n <tr>\n <th><\/th>\n <th class=\"csb-cell-center csb-col-cortex\">CORTEX NK<br><span style=\"opacity:0.6; font-weight:400;\">\ud83c\uddeb\ud83c\uddf7 France<\/span><\/th>\n <th class=\"csb-cell-center\">UEFI Secure Boot<br><span style=\"opacity:0.6; font-weight:400;\">\ud83c\uddfa\ud83c\uddf8 Microsoft \u26a0<\/span><\/th>\n <th class=\"csb-cell-center\">Microsoft Pluton<br><span style=\"opacity:0.6; font-weight:400;\">\ud83c\uddfa\ud83c\uddf8 USA \u26a0<\/span><\/th>\n <th class=\"csb-cell-center\">Intel BootGuard<br><span style=\"opacity:0.6; font-weight:400;\">\ud83c\uddfa\ud83c\uddf8 USA \u26a0<\/span><\/th>\n <th class=\"csb-cell-center\">ARM TF-A<br><span style=\"opacity:0.6; font-weight:400;\">\ud83c\uddec\ud83c\udde7 Linaro<\/span><\/th>\n <th class=\"csb-cell-center\">Coreboot<br><span style=\"opacity:0.6; font-weight:400;\">Open source<\/span><\/th>\n <th class=\"csb-cell-center\">Apple Secure Boot<br><span style=\"opacity:0.6; font-weight:400;\">\ud83c\uddfa\ud83c\uddf8 Apple \u26a0<\/span><\/th>\n <\/tr>\n <\/thead>\n <tbody>\n <tr>\n <td><strong>V\u00e9rification formelle multi-outils<\/strong><br><span style=\"font-size:11.5px; color:#6A7588; font-style:italic;\">Frama-C + Isabelle\/HOL + CBMC<\/span><\/td>\n <td class=\"csb-cell-center csb-col-cortex csb-cell-ok\">\u2713<br><span style=\"font-size:11px; opacity:0.85;\">92 % moy. \u00b7 6 thm HOL<\/span><\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <\/tr>\n <tr>\n <td><strong>Signature post-quantique (FIPS 204)<\/strong><br><span style=\"font-size:11.5px; color:#6A7588; font-style:italic;\">ML-DSA-87 contre attaques quantiques 2030+<\/span><\/td>\n <td class=\"csb-cell-center csb-col-cortex csb-cell-ok\">\u2713 hybride<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <\/tr>\n <tr>\n <td><strong>Anti-rollback TPM 2.0 NV<\/strong><br><span style=\"font-size:11.5px; color:#6A7588; font-style:italic;\">Compteur monotone ancr\u00e9 silicium<\/span><\/td>\n <td class=\"csb-cell-center csb-col-cortex csb-cell-ok\">\u2713 S9 v1<\/td>\n <td class=\"csb-cell-center csb-cell-mid\">~ partiel<\/td>\n <td class=\"csb-cell-center csb-cell-mid\">~ proprio<\/td>\n <td class=\"csb-cell-center csb-cell-mid\">~ fusible<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <td class=\"csb-cell-center csb-cell-mid\">~ proprio<\/td>\n <\/tr>\n <tr>\n <td><strong>Recovery Option A STRICT<\/strong><br><span style=\"font-size:11.5px; color:#6A7588; font-style:italic;\">Aucun bypass automatique possible<\/span><\/td>\n <td class=\"csb-cell-center csb-col-cortex csb-cell-ok\">\u2713 S10 v1<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <td class=\"csb-cell-center csb-cell-mid\">~ Option C<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <td class=\"csb-cell-center csb-cell-mid\">~ DFU<\/td>\n <\/tr>\n <tr>\n <td><strong>Souverainet\u00e9 France \/ UE<\/strong><br><span style=\"font-size:11.5px; color:#6A7588; font-style:italic;\">Aucun Cloud Act \u00b7 aucune backdoor extra-territoriale<\/span><\/td>\n <td class=\"csb-cell-center csb-col-cortex csb-cell-ok\">\u2713<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <td class=\"csb-cell-center csb-cell-mid\">~ Linaro UK<\/td>\n <td class=\"csb-cell-center csb-cell-mid\">~ open<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <\/tr>\n <tr>\n <td><strong>Code source auditable<\/strong><\/td>\n <td class=\"csb-cell-center csb-col-cortex csb-cell-ok\">\u2713 CESTI<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <td class=\"csb-cell-center csb-cell-ok\">\u2713<\/td>\n <td class=\"csb-cell-center csb-cell-ok\">\u2713<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <\/tr>\n <tr>\n <td><strong>Trajectoire CSPN ANSSI<\/strong><\/td>\n <td class=\"csb-cell-center csb-col-cortex csb-cell-mid\">En cours 2027<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <\/tr>\n <tr>\n <td><strong>Common Criteria EAL<\/strong><\/td>\n <td class=\"csb-cell-center csb-col-cortex csb-cell-mid\">Trajectoire EAL5\/6 \u2192 EAL7 2030<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <\/tr>\n <tr>\n <td><strong>Vuln\u00e9rabilit\u00e9s publiques connues<\/strong><br><span style=\"font-size:11.5px; color:#6A7588; font-style:italic;\">CVE majeures contournant le Secure Boot<\/span><\/td>\n <td class=\"csb-cell-center csb-col-cortex csb-cell-ok\">0<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">BlackLotus<br>BootHole<br>LogoFAIL<\/td>\n <td class=\"csb-cell-center csb-cell-mid\">limit\u00e9<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">CVE 2017<br>CVE 2018<br>CVE 2019<\/td>\n <td class=\"csb-cell-center csb-cell-mid\">limit\u00e9<\/td>\n <td class=\"csb-cell-center csb-cell-mid\">limit\u00e9<\/td>\n <td class=\"csb-cell-center csb-cell-mid\">checkm8<\/td>\n <\/tr>\n <tr>\n <td><strong>Export UGAP \/ DGA France<\/strong><\/td>\n <td class=\"csb-cell-center csb-col-cortex csb-cell-ok\">\u2713<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <td class=\"csb-cell-center csb-cell-mid\">~<\/td>\n <td class=\"csb-cell-center csb-cell-mid\">~<\/td>\n <td class=\"csb-cell-center csb-cell-ko\">\u2717<\/td>\n <\/tr>\n <\/tbody>\n <\/table>\n \n <div class=\"csb-disclaimer\">\n <strong>Lecture du tableau.<\/strong> UEFI Secure Boot est l’industriel <em>standard<\/em> mais\n a \u00e9t\u00e9 contourn\u00e9 publiquement \u00e0 plusieurs reprises (BlackLotus 2023, BootHole 2020, LogoFAIL\n 2023). Microsoft Pluton et Intel BootGuard sont propri\u00e9taires ferm\u00e9s, non auditables, soumis\n au Cloud Act am\u00e9ricain. ARM TF-A est open source mais sans certification CC. Coreboot reste\n un projet communautaire sans trajectoire certifiable. <strong>CORTEX NK Secure Boot est le\n seul module au monde combinant les dix crit\u00e8res.<\/strong> Sources : uefi.org, microsoft.com,\n intel.com, trustedfirmware.org, coreboot.org, apple.com, mai 2026.\n <\/div>\n <\/div>\n<\/section>\n \n \n<!-- ========= SECTION 9 \u2014 CTA ========= -->\n<section class=\"csb-cta-band\">\n <div class=\"csb-container\">\n <div class=\"csb-eyebrow\">Programme CORTEX ORIGIN\u2122 \u00b7 Module Secure Boot \u00b7 v1.0-secboot-complete<\/div>\n <h2 class=\"csb-cta-title\">D\u00e9marrer en confiance.<\/h2>\n <p class=\"csb-subtitle\" style=\"margin: 0 auto 40px; text-align: center;\">\n Code source disponible sur demande pour CESTI agr\u00e9\u00e9s et partenaires institutionnels.\n Rapports CFVL-BENCH-SECBOOT-001 v2.0 et CFVL-BENCH-MTTD-002 v2.1. D\u00e9monstrations sur sc\u00e9narios\n drone tactique, automotive ASIL-D, infrastructure \u00e9nergie disponibles. <strong>Module Secure Boot 100% complet \u00b7 21 mai 2026.<\/strong>\n <\/p>\n <div class=\"csb-cta-buttons\">\n <a href=\"mailto:demo@cortexorigin.com\" class=\"csb-btn csb-btn-primary\">Demander une d\u00e9mo<\/a>\n <a href=\"mailto:press@cortexorigin.com\" class=\"csb-btn csb-btn-secondary\">Contact technique<\/a>\n <\/div>\n <p style=\"margin-top: 48px; font-size: 12px; color: #6B7A95; letter-spacing: 0.06em;\">\n Confidentiel \u00b7 CORTEX AI\u2122 SAS \u00b7 SIREN 991 880 428 \u00b7 58 rue de Monceau, 75008 Paris\n <\/p>\n <\/div>\n<\/section>\n \n<\/div>\n<\/div>\n","protected":false},"excerpt":{"rendered":"<p>Menu ORIGIN\u2122 ORIGIN\u2122 EAS \u00b7 EXPOSITION Plateforme CTEM EAS \u00b7 Exposition externe et interne \u2197 Ce que la plateforme mesure P\u00e9rim\u00e8tre interne \u00b7 annuaire LDAP \/ AD \u2197 Gouvernance & trace de d\u00e9cision \u2197 Paysage concurrentiel \u2197 Demander une cartographie \u2197 AETZU ARROW AI\u2122 AETZU ARROW AI AETZU ARROW AI\u2122 \u00b7 D\u00e9fense active \u2197 Analyse […]<\/p>\n","protected":false},"author":1,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"footnotes":""},"class_list":["post-1517","page","type-page","status-publish","hentry"],"_links":{"self":[{"href":"https:\/\/cortexorigin.com\/index.php\/wp-json\/wp\/v2\/pages\/1517","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/cortexorigin.com\/index.php\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/cortexorigin.com\/index.php\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/cortexorigin.com\/index.php\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/cortexorigin.com\/index.php\/wp-json\/wp\/v2\/comments?post=1517"}],"version-history":[{"count":15,"href":"https:\/\/cortexorigin.com\/index.php\/wp-json\/wp\/v2\/pages\/1517\/revisions"}],"predecessor-version":[{"id":1922,"href":"https:\/\/cortexorigin.com\/index.php\/wp-json\/wp\/v2\/pages\/1517\/revisions\/1922"}],"wp:attachment":[{"href":"https:\/\/cortexorigin.com\/index.php\/wp-json\/wp\/v2\/media?parent=1517"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}